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IPPS
2006
IEEE
14 years 4 months ago
Exploiting programmable network interfaces for parallel query execution in workstation clusters
Workstation clusters equipped with high performance interconnect having programmable network processors facilitate interesting opportunities to enhance the performance of parallel...
V. Santhosh Kumar, Matthew J. Thazhuthaveetil, R. ...
FCCM
2009
IEEE
189views VLSI» more  FCCM 2009»
14 years 5 months ago
Application Specific Customization and Scalability of Soft Multiprocessors
Although soft microprocessors are widely used in FPGAs, limited work has been performed regarding how to automatically and efficiently generate soft multiprocessors. In this paper...
Deepak Unnikrishnan, Jia Zhao, Russell Tessier
DATE
2010
IEEE
135views Hardware» more  DATE 2010»
14 years 3 months ago
Mapping scientific applications on a large-scale data-path accelerator implemented by single-flux quantum (SFQ) circuits
— To overcome issues originating from the CMOS technology, a large-scale reconfigurable data-path (LSRDP) processor based on single-flux quantum circuits is introduced. LSRDP is ...
Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, ...
ASAP
2002
IEEE
103views Hardware» more  ASAP 2002»
14 years 3 months ago
PAPA - Packed Arithmetic on a Prefix Adder for Multimedia Applications
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...
Neil Burgess
DSD
2002
IEEE
146views Hardware» more  DSD 2002»
14 years 3 months ago
Configurable Memory Organisation for Communication Applications
A configurable memory organisation for the execution of Hiperlan/2 transceiver baseband processing and MPEG2 decoding is presented. The configuration of the memory system is done ...
Juha-Pekka Soininen, Antti Pelkonen, Jussi Roivain...