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PPOPP
2010
ACM
14 years 3 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
IPPS
2010
IEEE
13 years 6 months ago
pFANGS: Parallel high speed sequence mapping for Next Generation 454-roche Sequencing reads
Millions of DNA sequences (reads) are generated by Next Generation Sequencing machines everyday. There is a need for high performance algorithms to map these sequences to the refer...
Sanchit Misra, Ramanathan Narayanan, Wei-keng Liao...
ECSQARU
2003
Springer
14 years 2 months ago
Computational-Workload Based Binarization and Partition of Qualitative Markov Trees for Belief Combination
Abstract. Binary join trees have been a popular structure to compute the impact of multiple belief functions initially assigned to nodes of trees or networks. Shenoy has proposed t...
Weiru Liu, Xin Hong, Kenneth Adamson
HPCA
2000
IEEE
14 years 1 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
14 years 2 months ago
Comparing Analytical Modeling with Simulation for Network Processors: A Case Study
Programming network processors remains an art due to the variety of different network processor architectures and due to little support to reason and explore implementations on su...
Matthias Gries, Chidamber Kulkarni, Christian Saue...