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» Program Optimization and Parallelization Using Idioms
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LCTRTS
2007
Springer
14 years 3 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 7 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
ESTIMEDIA
2007
Springer
14 years 4 months ago
Leveraging Predicated Execution for Multimedia Processing
—Modern compression standards such as H.264, DivX, or VC-1 provide astonishing quality at the costs of steadily increasing processing requirements. Therefore, efficient solution...
Dietmar Ebner, Florian Brandner, Andreas Krall
BMCBI
2010
132views more  BMCBI 2010»
13 years 10 months ago
Data structures and compression algorithms for high-throughput sequencing technologies
Background: High-throughput sequencing (HTS) technologies play important roles in the life sciences by allowing the rapid parallel sequencing of very large numbers of relatively s...
Kenny Daily, Paul Rigor, Scott Christley, Xiaohui ...
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
14 years 6 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang