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» Programmable Asynchronous Pipeline Arrays
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FPGA
2006
ACM
117views FPGA» more  FPGA 2006»
13 years 11 months ago
Context-free-grammar based token tagger in reconfigurable devices
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
Young H. Cho, James Moscola, John W. Lockwood
TREC
2007
13 years 8 months ago
Exegy at TREC 2007 Million Query Track
Exegy’s submission for the TREC 2007 million query track consisted of results obtained by running the queries against the raw data, i.e., the data was not indexed. The hardwarea...
Naveen Singla, Ronald S. Indeck
TPDS
2010
260views more  TPDS 2010»
13 years 5 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
13 years 11 months ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
FCCM
2008
IEEE
212views VLSI» more  FCCM 2008»
14 years 1 months ago
Map-reduce as a Programming Model for Custom Computing Machines
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, ...