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FCCM
2004
IEEE
141views VLSI» more  FCCM 2004»
14 years 1 months ago
Deep Packet Filter with Dedicated Logic and Read Only Memories
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
Young H. Cho, William H. Mangione-Smith
TON
2002
77views more  TON 2002»
13 years 9 months ago
Packet-mode scheduling in input-queued cell-based switches
We consider input-queued switch architectures dealing at their interfaces with variable-size packets, but internally operating on fixed-size cells. Packets are segmented into cells...
Marco Ajmone Marsan, Andrea Bianco, Paolo Giaccone...
ANCS
2007
ACM
14 years 1 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
FPL
2003
Springer
81views Hardware» more  FPL 2003»
14 years 3 months ago
A TCP/IP Based Multi-device Programming Circuit
This paper describes a lightweight Field Programmable Gate Array (FPGA) circuit design that supports the simultaneous programming of multiple devices at different locations throug...
David V. Schuehler, Harvey Ku, John W. Lockwood
ICCS
2005
Springer
14 years 3 months ago
Resource Partitioning Algorithms in a Programmable Service Grid Architecture
Abstract. We propose the use of programmable Grid resource partitioning heuristics in the context of a distributed service Grid management architecture. The architecture is capable...
Pieter Thysebaert, Bruno Volckaert, Marc De Leenhe...