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ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 3 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
ISCA
2000
IEEE
121views Hardware» more  ISCA 2000»
14 years 2 months ago
Selective, accurate, and timely self-invalidation using last-touch prediction
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
An-Chow Lai, Babak Falsafi
CGO
2004
IEEE
14 years 1 months ago
Static Identification of Delinquent Loads
The effective use of processor caches is crucial to the performance of applications. It has been shown that cache misses are not evenly distributed throughout a program. In applic...
Vlad-Mihai Panait, Amit Sasturkar, Weng-Fai Wong
ENVSOFT
2006
84views more  ENVSOFT 2006»
13 years 10 months ago
Modeling the fate of down-the-drain chemicals in rivers: An improved software for GREAT-ER
GREAT-ER (Geography-referenced Regional Exposure Assessment Tool for European Rivers) is a model system for predicting chemical fate and exposure in surface waters. The GREAT-ER a...
F. Koormann, J. Rominger, D. Schowanek, J.-O. Wagn...
INFFUS
2008
175views more  INFFUS 2008»
13 years 10 months ago
Adaptive optimization of join trees for multi-join queries over sensor streams
Data processing applications for sensor streams have to deal with multiple continuous data streams with inputs arriving at highly variable and unpredictable rates from various sour...
Joseph S. Gomes, Hyeong-Ah Choi
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