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2007
IEEE
14 years 3 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
CODES
2007
IEEE
14 years 3 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
HPCA
2007
IEEE
14 years 3 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
ICC
2007
IEEE
146views Communications» more  ICC 2007»
14 years 3 months ago
Optimally Mapping an Iterative Channel Decoding Algorithm to a Wireless Sensor Network
–Retransmission based schemes are not suitable for energy constrained wireless sensor networks. Hence, there is an interest in including parity bits in each packet for error cont...
Saad B. Qaisar, Shirish S. Karande, Kiran Misra, H...
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
14 years 3 months ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...
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