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DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
14 years 3 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
GECCO
2003
Springer
14 years 1 months ago
Enhancing the Performance of GP Using an Ancestry-Based Mate Selection Scheme
The performance of genetic programming relies mostly on population-contained variation. If the population diversity is low then there will be a greater chance of the algorithm bein...
Rodney Fry, Andrew M. Tyrrell
JCDL
2010
ACM
187views Education» more  JCDL 2010»
13 years 10 months ago
Social network document ranking
In search engines, ranking algorithms measure the importance and relevance of documents mainly based on the contents and relationships between documents. User attributes are usual...
Liang Gou, Xiaolong Zhang, Hung-Hsuan Chen, Jung-H...
AAAI
2000
13 years 10 months ago
Iterative Flattening: A Scalable Method for Solving Multi-Capacity Scheduling Problems
One challenge for research in constraint-based scheduling has been to produce scalable solution procedures under fairly general representational assumptions. Quite often, the comp...
Amedeo Cesta, Angelo Oddi, Stephen F. Smith
CORR
2010
Springer
175views Education» more  CORR 2010»
13 years 5 months ago
Improving the Performance of maxRPC
Max Restricted Path Consistency (maxRPC) is a local consistency for binary constraints that can achieve considerably stronger pruning than arc consistency. However, existing maxRPC...
Thanasis Balafoutis, Anastasia Paparrizou, Kostas ...