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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 1 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
ICDCSW
2000
IEEE
13 years 12 months ago
Enabling Flexible QoS Support in the Object Request Broker COOL
Support of end-to-end Quality-of-Service (QoS) and ate high-level programming abstractions are two crucial factors for the development of future telecommunication services and dis...
Tom Kristensen, Thomas Plagemann
SAC
2000
ACM
13 years 12 months ago
Parallel C++ for the Java Virtual Machine
Object-oriented modeling and design is a way of solving problems using models based upon real-world concepts. In this paradigm, the fundamental construct is the object, an entity ...
Timothy E. Denehy, Chang-Hyun Jo
SAMOS
2007
Springer
14 years 1 months ago
An Interrupt Controller for FPGA-based Multiprocessors
— Interrupt-based programming is widely used for interfacing a processor with peripherals and allowing software threads to interact. Many hardware/software architectures have bee...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
APCSAC
2003
IEEE
13 years 11 months ago
On Implementing High Level Concurrency in Java
Abstract. Increasingly threading has become an important architectural component of programming languages to support parallel programming. Previously we have proposed an elegant la...
G. Stewart Von Itzstein, Mark Jasiunas