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RTAS
2008
IEEE
14 years 1 months ago
A Switch Design for Real-Time Industrial Networks
The convergence of computers and the physical world is the theme for next generation networking research. This trend calls for real-time network infrastructure, which requires a h...
Qixin Wang, Sathish Gopalakrishnan, Xue Liu, Lui S...
INFOCOM
2002
IEEE
14 years 12 days ago
Fair Scheduling and Buffer Management in Internet Routers
Abstract—Input buffered switch architecture has become attractive for implementing high performance routers and expanding use of the Internet sees an increasing need for quality ...
Nan Ni, Laxmi N. Bhuyan
ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 1 months ago
Microarchitecture of a High-Radix Router
Evolving semiconductor and circuit technology has greatly increased the pin bandwidth available to a router chip. In the early 90s, routers were limited to 10Gb/s of pin bandwidth...
John Kim, William J. Dally, Brian Towles, Amit K. ...
CONEXT
2010
ACM
13 years 5 months ago
SecondNet: a data center network virtualization architecture with bandwidth guarantees
In this paper, we propose virtual data center (VDC) as the unit of resource allocation for multiple tenants in the cloud. VDCs are more desirable than physical data centers becaus...
Chuanxiong Guo, Guohan Lu, Helen J. Wang, Shuang Y...
IPPS
2006
IEEE
14 years 1 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...