102 search results - page 19 / 21 » Pseudo-Exhaustive Testing of Sequential Circuits |
VTS
1999
IEEE
14 years 4 days ago
1999
IEEE
Sequential test generators fail to yield tests for some stuck-at-faults because they are unable to reach certain states necessary for exciting propagating these target faults. Add...
CF
2004
ACM
14 years 1 months ago
2004
ACM
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
We propose a post-placement physical synthesis algorithm that can apply multiple circuit synthesis and placement transforms on a placed circuit to improve the critical path delay ...
APIN
2002
13 years 7 months ago
2002
This paper describes a new learning by example mechanism and its application for digital circuit design automation. This mechanism uses finite state machines to represent the infer...
MEMOCODE
2007
IEEE
14 years 2 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...