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DSD
2009
IEEE
136views Hardware» more  DSD 2009»
13 years 11 months ago
An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
Pierfrancesco Foglia, Francesco Panicucci, Cosimo ...
ICAC
2007
IEEE
13 years 11 months ago
Exploiting Platform Heterogeneity for Power Efficient Data Centers
It has recently become clear that power management is of critical importance in modern enterprise computing environments. The traditional drive for higher performance has influenc...
Ripal Nathuji, Canturk Isci, Eugene Gorbatov
CF
2006
ACM
13 years 11 months ago
An efficient cache design for scalable glueless shared-memory multiprocessors
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...
Alberto Ros, Manuel E. Acacio, José M. Garc...
ACMICEC
2008
ACM
262views ECommerce» more  ACMICEC 2008»
13 years 9 months ago
Preventing information leakage between collaborating organisations
Information sharing and protection against leakage is a critical problem especially for organisations having sensitive information. Sharing content between individuals in the same...
Muntaha Alawneh, Imad M. Abbadi
COCO
2010
Springer
149views Algorithms» more  COCO 2010»
13 years 9 months ago
Trade-Off Lower Bounds for Stack Machines
—A space bounded Stack Machine is a regular Turing Machine with a read-only input tape, several space bounded read-write work tapes, and an unbounded stack. Stack Machines with a...
Matei David, Periklis A. Papakonstantinou