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WSC
1997
13 years 11 months ago
Design and Implementation of HLA Time Management in the RTI Version F.0
The DoD High Level architecture (HLA) has recently become the required method for the interconnection of all DoD computer simulations. The HLA addresses the rules by which simulat...
Christopher D. Carothers, Richard Fujimoto, Richar...
CODES
2009
IEEE
14 years 2 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
DATE
2005
IEEE
168views Hardware» more  DATE 2005»
14 years 3 months ago
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection
This paper explores methods for hardware acceleration of Hidden Markov Model (HMM) decoding for the detection of persons in still images. Our architecture exploits the inherent st...
Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk
PRDC
2007
IEEE
14 years 4 months ago
Model Based Development of Safety-Critical Systems Using Template Based Code Generation
Model-based development is state of the art in software engineering, due to its potential regarding automatic code synthesis. Nevertheless for embedded systems, where there exists...
Matthias Regensburger, Christian Buckl, Alois Knol...
EUROSPI
2008
Springer
13 years 12 months ago
A Software Engineering Lifecycle Standard for Very Small Enterprises
Industry recognizes that very small enterprises (VSE), that develop parts involving software components are very important to the economy. These parts are often integrated into pro...
Claude Y. Laporte, Simon Alexandre, Rory O'Connor