352 search results - page 13 / 71 » Quantifying Instruction Criticality |
ISCA
2002
IEEE
14 years 10 days ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
Small area and code size are two critical design issues in most of embedded system designs. In this paper, we tackle these issues by customizing forwarding networks and instructio...
CE
2007
13 years 7 months ago
2007
The rapid development of computer and Internet technologies has made e-Learning become an important learning method. There has been a considerable increase in the needs for multim...
DATE
2002
IEEE
14 years 11 days ago
2002
IEEE
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
HIPC
2000
Springer
13 years 11 months ago
2000
Springer
Within two or three technology generations, processor architects will face a number of major challenges. Wire delays will become critical, and power considerations will temper the ...