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ISCAS
2006
IEEE
142views Hardware» more  ISCAS 2006»
14 years 2 months ago
An efficient texture cache for programmable vertex shaders
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
Seunghyun Cho, Chang-Hyo Yu, Lee-Sup Kim
TC
2002
13 years 8 months ago
Multiversion Data Broadcast
Broadcasting provides an efficient means for disseminating information in both wired and wireless setting. In this paper, we propose a suite of broadcast organization schemes for ...
Evaggelia Pitoura, Panos K. Chrysanthis
IPPS
1997
IEEE
14 years 18 days ago
DPF: A Data Parallel Fortran Benchmark Suite
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
Y. Charlie Hu, S. Lennart Johnsson, Dimitris Kehag...
FCCM
2009
IEEE
115views VLSI» more  FCCM 2009»
14 years 8 days ago
Multi-Core Architecture on FPGA for Large Dictionary String Matching
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...
Qingbo Wang, Viktor K. Prasanna
TVLSI
2008
139views more  TVLSI 2008»
13 years 8 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood