Sciweavers

76 search results - page 2 / 16
» Quantifying instruction criticality for shared memory multip...
Sort
View
TPDS
1998
108views more  TPDS 1998»
13 years 7 months ago
Critical Path Profiling of Message Passing and Shared-Memory Programs
—In this paper, we introduce a runtime, nontrace-based algorithm to compute the critical path profile of the execution of message passing and shared-memory parallel programs. Our...
Jeffrey K. Hollingsworth
COMPUTER
1998
94views more  COMPUTER 1998»
13 years 7 months ago
Multiprocessors Should Support Simple Memory-Consistency Models
provide tools or abstractions that allow developers to program in parallel. But what hardware do we need to support shared memory threads? The hardware should provide a well-defin...
Mark D. Hill
PACT
2007
Springer
14 years 1 months ago
Support for Fine-Grained Synchronization in Shared-Memory Multiprocessors
Abstract. It has been already verified that hardware-supported finegrain synchronization provides a significant performance improvement over coarse-grained synchronization mecha...
Vladimir Vlassov, Oscar Sierra Merino, Csaba Andra...
HPCA
1995
IEEE
13 years 11 months ago
Implementation of Atomic Primitives on Distributed Shared Memory Multiprocessors
In this paper we consider several hardware implementations of the general-purpose atomic primitives fetch and Φ, compare and swap, load linked, and store conditionalon large-scal...
Maged M. Michael, Michael L. Scott
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
14 years 1 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman