Sciweavers

214 search results - page 6 / 43
» Quasi-Resonant Interconnects: A Low Power Design Methodology
Sort
View
VLSISP
2008
147views more  VLSISP 2008»
13 years 6 months ago
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder
Data access usually leads to more than 50% of the power cost in a modern signal processing system. To realize a low-power design, how to reduce the memory access power is a critica...
Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sun...
VLSID
2010
IEEE
173views VLSI» more  VLSID 2010»
13 years 11 months ago
Voltage-Frequency Planning for Thermal-Aware, Low-Power Design of Regular 3-D NoCs
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
Mohammad Arjomand, Hamid Sarbazi-Azad
ISCAS
2003
IEEE
77views Hardware» more  ISCAS 2003»
14 years 1 months ago
Inductive interconnect width optimization for low power
The width of an interconnect line a ects the total power consumed by a circuit. A tradeo exists, however, between the dynamic power and the short-circuit power in determining the ...
Magdy A. El-Moursy, Eby G. Friedman
ISLPED
2010
ACM
236views Hardware» more  ISLPED 2010»
13 years 8 months ago
Analysis and design of ultra low power thermoelectric energy harvesting systems
Thermal energy harvesting using micro-scale thermoelectric generators is a promising approach to alleviate the power supply challenge in ultra low power systems. In thermal energy...
Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaush...
ANCS
2009
ACM
13 years 5 months ago
Design of a scalable nanophotonic interconnect for future multicores
As communication-centric computing paradigm gathers momentum due to increased wire delays and excess power dissipation with technology scaling, researchers have focused their atte...
Avinash Karanth Kodi, Randy Morris