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VTS
1997
IEEE
133views Hardware» more  VTS 1997»
14 years 2 months ago
ATPG for scan chain latches and flip-flops
A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking ex...
Samy Makar, Edward J. McCluskey
PTS
2000
75views Hardware» more  PTS 2000»
13 years 11 months ago
Structural Coverage For LOTOS - a Probe Insertion Technique
Coverage analysis of programs and specifications is a common approach to measure the quality and the adequacy of a test suite. This paper presents a probe insertion technique for m...
Daniel Amyot, Luigi Logrippo
ISSTA
2000
ACM
14 years 2 months ago
Simplifying failure-inducing input
Given some test case, a program fails. Which part of the test case is responsible for the particular failure? We show how our delta debugging algorithm generalizes and simplifies...
Ralf Hildebrandt, Andreas Zeller
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 4 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
GPCE
2003
Springer
14 years 3 months ago
A Case for Test-Code Generation in Model-Driven Systems
A primary goal of generative programming and model-driven ent is to raise the level of abstraction at which designers and developers interact with the software systems they are bui...
Matthew J. Rutherford, Alexander L. Wolf