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DATE
2006
IEEE
151views Hardware» more  DATE 2006»
14 years 3 months ago
Designing MRF based error correcting circuits for memory elements
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
DSD
2006
IEEE
114views Hardware» more  DSD 2006»
14 years 3 months ago
Improved Precision of Coarse Grained Localization in Wireless Sensor Networks
In wireless sensor networks, the coarse grained localization is a method to compute the position of randomly distributed sensor nodes. Without optimizations, it provides low preci...
Frank Reichenbach, Jan Blumenthal, Dirk Timmermann
ATS
2005
IEEE
104views Hardware» more  ATS 2005»
14 years 2 months ago
Leakage Current Based Stabilization Scheme for Robust Sense-Amplifier Design for Yield Enhancement in Nano-scale SRAM
In this paper, we develop a method to analyze the probability of access failure in SRAM array (due to random Vt variation in transistors) by jointly considering variations in cell...
Saibal Mukhopadhyay, Arijit Raychowdhury, Hamid Ma...
GECCO
2003
Springer
14 years 2 months ago
Selection in the Presence of Noise
For noisy optimization problems, there is generally a trade-off between the effort spent to reduce the noise (in order to allow the optimization algorithm to run properly), and t...
Jürgen Branke, Christian Schmidt 0002
TCAD
2008
73views more  TCAD 2008»
13 years 9 months ago
Reduction of Parametric Failures in Sub-100-nm SRAM Array Using Body Bias
Abstract--In this paper, we present a postsilicon-tuning technique to improve parametric yield of SRAM array using body bias (BB). First, we show that, although parametric failures...
Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy