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DATE
2009
IEEE
131views Hardware» more  DATE 2009»
14 years 4 months ago
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
SIGDOC
2004
ACM
14 years 3 months ago
Automatic evaluation of aspects of document quality
Coh-Metrix is a web-based application currently in development that automatically evaluates text. It uses two central concepts from discourse processing: text-based cohesion and s...
David F. Dufty, Danielle S. McNamara, Max M. Louwe...
MICRO
2000
IEEE
80views Hardware» more  MICRO 2000»
14 years 2 months ago
Silent stores for free
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
Kevin M. Lepak, Mikko H. Lipasti
ICPP
1999
IEEE
14 years 2 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
HOTOS
2009
IEEE
14 years 1 months ago
FlashVM: Revisiting the Virtual Memory Hierarchy
Flash memory is the largest change to storage in recent history. To date, most research has focused on integrating flash as persistent storage in file systems, with little emphasi...
Mohit Saxena, Michael M. Swift