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» Realizability of Real-Time Logics
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ISCAS
2002
IEEE
82views Hardware» more  ISCAS 2002»
14 years 2 months ago
Logic synthesis for PLA with 2-input logic elements
In this paper, we present a new logic synthesis method for PLA with 2-input logic elements. A PLA with 2-input logic elements can achieve low-power dissipation and high-speed oper...
Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Ku...
ICML
1989
IEEE
14 years 1 months ago
Higher-Order and Modal Logic as a Framework for Explanation-Based Generalization
Logic programming provides a uniform framework in which all aspects of explanation-based generalization and learning may be defined and carried out, but first-order Horn logic i...
Scott Dietzen, Frank Pfenning
VLSID
2009
IEEE
130views VLSI» more  VLSID 2009»
14 years 10 months ago
Reversible Logic Synthesis with Output Permutation
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
Daniel Große, Gerhard W. Dueck, Robert Wille...
ENTCS
2002
91views more  ENTCS 2002»
13 years 9 months ago
Subtyping in Logical Form
By using intersection types and filter models we formulate a theory of types for a -calculus with record subtyping via a finitary programming logic. Types are interpreted as space...
Ugo de'Liguoro
FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
14 years 1 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski