223 search results - page 30 / 45 » Realization of Boolean control networks |
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
—Accurate analog models of power system components are required in order to realize an analog computation engine for power systems. Analog computation is an area of continued int...
SAMOS
2004
Springer
14 years 3 months ago
2004
Springer
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...
IPPS
2003
IEEE
14 years 3 months ago
2003
IEEE
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
COMPSAC
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—The pervasiveness of complex communication services and the need for end-users to play a greater role in developing communication services have resulted in the creation ...
FPGA
2001
ACM
14 years 2 months ago
2001
ACM
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...