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141
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EUROPAR
2008
Springer
15 years 5 months ago
Performance Implications of Cache Affinity on Multicore Processors
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
Vahid Kazempour, Alexandra Fedorova, Pouya Alagheb...
135
Voted
SASN
2006
ACM
15 years 9 months ago
Attack-resilient hierarchical data aggregation in sensor networks
In a large sensor network, in-network data aggregation, i.e., combining partial results at intermediate nodes during message routing, significantly reduces the amount of communic...
Sankardas Roy, Sanjeev Setia, Sushil Jajodia
120
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BMCBI
2008
79views more  BMCBI 2008»
15 years 3 months ago
A high-throughput pipeline for designing microarray-based pathogen diagnostic assays
Background: We present a methodology for high-throughput design of oligonucleotide fingerprints for microarray-based pathogen diagnostic assays. The oligonucleotide fingerprints, ...
Ravi Vijaya Satya, Nela Zavaljevski, Kamal Kumar, ...
145
Voted
TVLSI
2002
97views more  TVLSI 2002»
15 years 3 months ago
Techniques for energy-efficient communication pipeline design
The performance of many modern computer and communication systems is dictated by the latency of communication pipelines. At the same time, power/energy consumption is often another...
Gang Qu, Miodrag Potkonjak
141
Voted
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
16 years 17 days ago
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...