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DAC
2007
ACM
14 years 11 months ago
Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction
The ability to account for the growing impacts of multiple process variations in modern technologies is becoming an integral part of nanometer VLSI design. Under the context of ti...
Zhuo Feng, Peng Li, Yaping Zhan
DAC
2003
ACM
14 years 11 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
DAC
2004
ACM
14 years 11 months ago
Efficient power/ground network analysis for power integrity-driven design methodology
As technology advances, the metal width is decreasing with the length increasing, making the resistance along the power line increase substantially. Together with the nonlinear sc...
Su-Wei Wu, Yao-Wen Chang
DAC
2005
ACM
14 years 11 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2005
ACM
14 years 11 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
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