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» Reconfigurable Architectures: A New Vision for Optimization ...
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DAC
2001
ACM
14 years 8 months ago
Watermarking Graph Partitioning Solutions
Trends in the semiconductor industry towards extensive design and code reuse motivate a need for adequate Intellectual Property Protection (IPP) schemes. We offer a new general IP...
Gregory Wolfe, Jennifer L. Wong, Miodrag Potkonjak
DAC
2009
ACM
14 years 8 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DAC
2005
ACM
13 years 9 months ago
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
Peng Li
ANCS
2009
ACM
13 years 5 months ago
Weighted random oblivious routing on torus networks
Torus, mesh, and flattened butterfly networks have all been considered as candidate architectures for on-chip interconnection networks. In this paper, we study the problem of opti...
Rohit Sunkam Ramanujam, Bill Lin
DAC
2000
ACM
14 years 8 months ago
Fingerprinting intellectual property using constraint-addition
Recently, intellectual property protection (IPP) techniques attracted a great deal of attention from semiconductor, system integration and software companies. A number of watermar...
Gang Qu, Miodrag Potkonjak