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DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 2 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
ARCS
2004
Springer
14 years 23 days ago
Evaluation of Run-Time Reconfiguration for General-Purpose Computing
: In order to investigate the impact of dynamic hardware reconfiguration on general-purpose applications, we present a superscalar micro-architecture that includes a variable numbe...
Adronis Niyonkuru, Hans Christoph Zeidler
IPSN
2004
Springer
14 years 2 months ago
Constraint-guided dynamic reconfiguration in sensor networks
This paper presents an approach for dynamic software reconfiguration in sensor networks. Our approach utilizes explicit models of the design space of the embedded application. The...
Sachin Kogekar, Sandeep Neema, Brandon Eames, Xeno...
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
14 years 23 days ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
14 years 2 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...