Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
Alok N. Choudhary, Wei-keng Liao, Donald Weiner, P...
Decoder architectures for architecture-aware Raptor codes having regular message access-and-processing patterns are presented. Raptor codes are a class of concatenated codes compo...
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas...