52 search results - page 5 / 11 » Reconfigurable Computing for Space-Time Adaptive Processing |
DFT
2008
IEEE
14 years 3 months ago
2008
IEEE
Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
IPPS
1998
IEEE
14 years 23 days ago
1998
IEEE
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
ICASSP
2011
IEEE
13 years 8 days ago
2011
IEEE
Decoder architectures for architecture-aware Raptor codes having regular message access-and-processing patterns are presented. Raptor codes are a class of concatenated codes compo...
ASPDAC
1995
ACM
14 years 3 days ago
1995
ACM
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...