Sciweavers

230 search results - page 20 / 46
» Reconfigurable Fast Memory Management System Design for Appl...
Sort
View
CASES
2006
ACM
14 years 2 months ago
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...
Lan S. Bai, Lei Yang, Robert P. Dick
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
13 years 6 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...
ESTIMEDIA
2009
Springer
14 years 3 months ago
QoS management of dynamic video tasks by task splitting and skipping
—We have integrated processing with deterministic and non-deterministic resource usage in an overall application and evaluated its performance on a multi-core processor platform....
Rob Albers, Eric Suijs, Peter H. N. de With
GRID
2000
Springer
14 years 5 days ago
An Advanced User Interface Approach for Complex Parameter Study Process Specification on the Information Power Grid
The creation of parameter study suites has recently become a more challenging problem as the parameter studies have become multi-tiered and the computational environment has becom...
Maurice Yarrow, Karen M. McCann, Rupak Biswas, Rob...
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
14 years 1 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell