230 search results - page 4 / 46 » Reconfigurable Fast Memory Management System Design for Appl... |
ICPADS
2006
IEEE
14 years 1 months ago
2006
IEEE
—Recently, high-end reconfigurable computing systems that employ Field-Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors have been built. T...
DELTA
2008
IEEE
14 years 1 months ago
2008
IEEE
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
ARCS
2005
Springer
14 years 1 months ago
2005
Springer
Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting...
ISSS
2002
IEEE
14 years 10 days ago
2002
IEEE
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...