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IJFCS
2006
82views more  IJFCS 2006»
13 years 6 months ago
Routing Multiple Width Communications on the Circuit Switched Tree
Dynamically reconfigurable architectures offer extremely fast solutions to various problems. The Circuit Switched Tree (CST) is an important interconnect used to implement such ar...
Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L...
APCSAC
2003
IEEE
14 years 16 hour ago
Mapping Applications to a Coarse Grain Reconfigurable System
This paper introduces a method which can be used to map applications written in a high level source language program, like C, to a coarse grain reconfigurable architecture, MONTIU...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Mi...
DATE
2004
IEEE
151views Hardware» more  DATE 2004»
13 years 10 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis
CASES
2001
ACM
13 years 10 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
IPPS
2006
IEEE
14 years 22 days ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...