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VLSID
2002
IEEE
125views VLSI» more  VLSID 2002»
14 years 7 months ago
Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
Francisco Barat, Murali Jayapala, Pieter Op de Bee...
ARC
2008
Springer
87views Hardware» more  ARC 2008»
13 years 8 months ago
Online Hardware Task Scheduling and Placement Algorithm on Partially Reconfigurable Devices
In this paper, we propose an online hardware task scheduling and placement algorithm and evaluate it performance. Experimental results on large random task set show that our algori...
Thomas Marconi, Yi Lu 0004, Koen Bertels, Georgi G...
ICS
1999
Tsinghua U.
13 years 11 months ago
Reorganizing global schedules for register allocation
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
Gang Chen, Michael D. Smith
RTSS
1999
IEEE
13 years 11 months ago
Design and Evaluation of a Feedback Control EDF Scheduling Algorithm
Despite the significant body of results in real-time scheduling, many real world problems are not easily supported. While algorithms such as Earliest Deadline First, Rate Monotoni...
Chenyang Lu, John A. Stankovic, Gang Tao, Sang Hyu...
SKG
2005
IEEE
14 years 8 days ago
A Heuristic Algorithm for Task Scheduling Based on Mean Load
Efficient task scheduling is critical to achieving high performance on grid computing environment. A heuristic task scheduling algorithm satisfied resources load balancing on grid ...
Lina Ni, Jinquan Zhang, ChunGang Yan, Changjun Jia...