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» Reconfigurable Systems Enabled by a Network-on-Chip
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ERSA
2006
282views Hardware» more  ERSA 2006»
13 years 9 months ago
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture
Reconfigurable devices, such as FPGAs, introduce into the design workflow of embedded systems a new degree of freedom: the designer can have the system autonomously modify the fun...
Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santam...
CSMR
2009
IEEE
14 years 16 days ago
Handling the Dynamic Reconfiguration of Software Architectures Using Aspects
Currently, most software systems have a dynamic nature and need to evolve at run-time. For this reason, the dynamic reconfiguration of software architectures is a challenge that m...
Cristóbal Costa Soria, Jennifer Pére...
FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
14 years 4 days ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun
ARCS
2006
Springer
13 years 11 months ago
Combitgen: A new approach for creating partial bitstreams in Virtex-II Pro
Today's FPGAs (Field Programmable Gate Arrays) are widely used, but not to their full potential. In Virtex series FPGAs from Xilinx a special feature, the dynamic and partial...
Christopher Claus, Florian Helmut Müller, Wal...
IPPS
2006
IEEE
14 years 1 months ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...