Abstract. This paper presents a new approach to model and test hierarchical Graphical User Interfaces (GUIs). We exploit the structure of Hierarchical Finite State Machines (HFSMs)...
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
Alireza Sarvi, Carthik A. Sharma, Ronald F. DeMara
In this paper, we present a parallel algorithm for the minimization of deterministic finite state automata (DFA's) and discuss its implementation on a connection machine CM-5...
In this paper, we propose two fault models and methods for the derivation of interoperability test suites when the system implementation is given in the form of two deterministic c...
Abstract. Detection and isolation of failures in large and complex systems such as telecommunication networks are crucial and challenging tasks. The problem considered here is that...