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ICCD
1999
IEEE
93views Hardware» more  ICCD 1999»
13 years 11 months ago
Using an Embedded Processor for Efficient Deterministic Testing of Systems-on-a-Chip
If a system-on-a-chip (SOC) contains an embedded processor, this paper presents a novel approach for using the processor to aid in testing the other components of the SOC. The bas...
Abhijit Jas, Nur A. Touba
DELTA
2004
IEEE
13 years 11 months ago
Scan Test of IP Cores in an ATE Environment
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi
ATS
1996
IEEE
93views Hardware» more  ATS 1996»
13 years 11 months ago
Testable Design and Testing of MCMs Based on Multifrequency Scan
In this paper, we present a novel and efticient approach to test MCM at the module as well as chip levels. Our design incorporates the concept of the multifrequency test method an...
Wang-Dauh Tseng, Kuochen Wang
CORR
2008
Springer
66views Education» more  CORR 2008»
13 years 7 months ago
A Novel Approach to Formulae Production and Overconfidence Measurement to Reduce Risk in Spreadsheet Modelling
Research on formulae production in spreadsheets has established the practice as high risk yet unrecognised as such by industry. There are numerous software applications that are d...
Simon R. Thorne, David Ball, Zoe Lawson
CEC
2010
IEEE
13 years 8 months ago
Two novel Ant Colony Optimization approaches for Bayesian network structure learning
Learning Bayesian networks from data is an N-P hard problem with important practical applications. Several researchers have designed algorithms to overcome the computational comple...
Yanghui Wu, John A. W. McCall, David W. Corne