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» Reconfigurable trusted computing in hardware
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ERSA
2009
129views Hardware» more  ERSA 2009»
13 years 7 months ago
Data path Configuration Time Reduction for Run-time Reconfigurable Systems
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabe...
OSDI
2008
ACM
14 years 10 months ago
Hardware Enforcement of Application Security Policies Using Tagged Memory
Computers are notoriously insecure, in part because application security policies do not map well onto traditional protection mechanisms such as Unix user accounts or hardware pag...
Nickolai Zeldovich, Hari Kannan, Michael Dalton, C...
ARC
2008
Springer
128views Hardware» more  ARC 2008»
13 years 11 months ago
A Framework for the Automatic Generation of Instruction-Set Extensions for Reconfigurable Architectures
Abstract. In this paper we present a framework for the automatic identification and selection of convex MIMO instruction-set extensions for reconfigurable architecture. The framewo...
Carlo Galuzzi, Koen Bertels
CODES
2007
IEEE
14 years 1 months ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
ERSA
2009
91views Hardware» more  ERSA 2009»
13 years 7 months ago
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors
Configuration with Self-configured Data Path (CSDP) is a high speed configuration data loading method for Dynamically Reconfigurable Processors (DRPs). By using a prepared configu...
Toru Sano, Yoshiki Saito, Hideharu Amano