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» Reconfiguration of Resources in Middleware
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CODES
2010
IEEE
13 years 4 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
14 years 4 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
RECONFIG
2008
IEEE
140views VLSI» more  RECONFIG 2008»
14 years 2 months ago
Generalised Parallel Bilinear Interpolation Architecture for Vision Systems
Bilinear interpolation is widely used in computer vision for extracting pixel values for positions that lie off the pixel grid in an image. For each sub-pixel, the values of four ...
Suhaib A. Fahmy
ICNSC
2007
IEEE
14 years 1 months ago
Adaptive Network Flow Clustering
— Flow level measurements are used to provide insights into the traffic flow crossing a network link. However, existing flow based network detection devices lack adaptive reconfi...
Sui Song, Zhixiong Chen
CCECE
2006
IEEE
14 years 1 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem