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» Reconfiguration of Resources in Middleware
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JUCS
2007
102views more  JUCS 2007»
13 years 8 months ago
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
Oscar Pérez, Yves Berviller, Camel Tanougas...
FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
14 years 1 months ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun
MOBIQUITOUS
2005
IEEE
14 years 2 months ago
MAIPAN - Middleware for Application Interconnection in Personal Area Networks
This paper proposes the Middleware for Application Interconnection in Personal Area Networks (MAIPAN), a middleware that provides a uniform computing environment for creating dyna...
Miklós Aurél Rónai, Kristof F...
FCCM
1998
IEEE
149views VLSI» more  FCCM 1998»
14 years 28 days ago
Configuration Compression for the Xilinx XC6200 FPGA
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Scott Hauck, Zhiyuan Li, Eric J. Schwabe
CORR
2007
Springer
89views Education» more  CORR 2007»
13 years 8 months ago
Hardware Support for QoS-based Function Allocation in Reconfigurable Systems
This contribution presents a new approach for allocating suitable function-implementation variants depending on given quality-of-service functionrequirements for run-time reconfig...
Michael Ullmann, Wansheng Jin, Jürgen Becker