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VTS
1998
IEEE
97views Hardware» more  VTS 1998»
13 years 12 months ago
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Mat...
FCCM
2002
IEEE
321views VLSI» more  FCCM 2002»
14 years 19 days ago
Queue Machines: Hardware Compilation in Hardware
Abstract - In this paper, we hypothesize that reconfigurable computing is not more widely used because of the logistical difficulties caused by the close coupling of applications a...
Herman Schmit, Benjamin A. Levine, Benjamin Ylvisa...
FCCM
2004
IEEE
87views VLSI» more  FCCM 2004»
13 years 11 months ago
A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation
General purpose computing architectures are being called on to work on a more diverse application mix every day. This has been fueled by the need for reduced time to market and ec...
David Wentzlaff, Anant Agarwal
FPL
2003
Springer
74views Hardware» more  FPL 2003»
14 years 27 days ago
Reconfigurable Circuits Using Hybrid Hall Effect Devices
Abstract. Hybrid Hall effect (HHE) devices are a new class of reconfigurable logic devices that incorporate ferromagnetic elements to deliver nonvolatile operation. A single HHE de...
Steve Ferrera, Nicholas P. Carter