The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...
Redundant threading architectures duplicate all instructions to detect and possibly recover from transient faults. Several lighter weight Partial Redundant Threading (PRT) archite...
Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasa...
A method is proposed for the compression of hyperspectral signature vectors on severely resourceconstrained encoding platforms. The proposed technique, compressive-projection prin...
This research focuses on the performance and timing behavior of a two level survivability architecture. The lower level of the architecture involves attack analysis based on kernel...
William S. Harrison, Axel W. Krings, Nadine Hanebu...
Abstract. Two new techniques based on nonparametric estimation of probability densities are introduced which improve on the performance of equivalent robust methods currently emplo...