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SLIP
2003
ACM
16 years 17 days ago
A hierarchical three-way interconnect architecture for hexagonal processors
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...
BIRTHDAY
2003
Springer
16 years 16 days ago
Towards a Brain Compatible Theory of Syntax Based on Local Testability
Chomsky’s theory of syntax came after criticism of probabilistic associative models of word order in sentences. Immediate constituent structures are plausible but their descripti...
Stefano Crespi-Reghizzi, Valentino Braitenberg
187
Voted
ICALP
2003
Springer
16 years 15 days ago
Quantum Search on Bounded-Error Inputs
Suppose we have n algorithms, quantum or classical, each computing some bit-value with bounded error probability. We describe a quantum algorithm that uses O( √ n) repetitions of...
Peter Høyer, Michele Mosca, Ronald de Wolf
FOCS
2002
IEEE
16 years 8 days ago
The Partition Technique for Overlays of Envelopes
We obtain a near-tight bound of O(n3+ε ), for any ε > 0, on the complexity of the overlay of the minimization diagrams of two collections of surfaces in four dimensions. This...
Vladlen Koltun, Micha Sharir
197
Voted
GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
16 years 8 days ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha