740 search results - page 104 / 148 » Recursive layout generation |
ICASSP
2008
IEEE
14 years 5 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
ICRA
2008
IEEE
14 years 5 months ago
2008
IEEE
— Technologies to develop scaffolds with controlled pore layout and porosity have great significance in tissue engineering. As one method of scaffold fabrication, porogen leachin...
IISWC
2008
IEEE
14 years 5 months ago
2008
IEEE
—High-speed content inspection of network traffic is an important new application area for programmable networking systems, and has recently led to several proposals for high-per...
ISCAS
2008
IEEE
14 years 5 months ago
2008
IEEE
— A precision integrated bandgap voltage reference in 0.35μm CMOS technology is here presented. The circuit uses natural npn bipolar transistors as reference diodes. A particula...
ARITH
2007
IEEE
14 years 5 months ago
2007
IEEE
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...