62 search results - page 6 / 13 » Reduced Delay Uncertainty in High Performance Clock Distribu... |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
—Latch based circuits are widely adopted in high performance circuits. But there is a lack of accurate latch models for doing timing analysis. In this paper, we propose a new lat...
INFOCOM
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper introduces T-Lohi, a new class of distributed and energy-efficient media-access protocols (MAC) for underwater acoustic sensor networks (UWSN). MAC design for UWSN fac...
IEEEPACT
2002
IEEE
14 years 16 days ago
2002
IEEE
Clustering is an effective microarchitectural technique for reducing the impact of wire delays, the complexity, and the power requirements of microprocessors. In this work, we inv...
DSD
2002
IEEE
14 years 17 days ago
2002
IEEE
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
DC
2010
13 years 4 months ago
2010
In this paper, we present RAMBO, an algorithm for emulating a read/write distributed shared memory in a dynamic, rapidly changing environment. RAMBO provides a highly reliable, hi...