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» Reducing Compilation Time Overhead in Compiled Simulators
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ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 4 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
P2P
2008
IEEE
149views Communications» more  P2P 2008»
14 years 2 months ago
AREX: An Adaptive System for Secure Resource Access in Mobile P2P Systems
In open environments, such as mobile peer-to-peer systems, participants may need to access resources from unknown users. A critical security concern in such systems is the access ...
Brent Lagesse, Mohan Kumar, Matthew Wright
ICPP
2006
IEEE
14 years 1 months ago
Using Gossip for Dynamic Resource Discovery
— Resource discovery is the process of locating shared resources on a computer network. Previously studied examples include efficiently finding files with a given title on a ...
Eric Simonton, Byung Kyu Choi, Steven Seidel
INFOCOM
2006
IEEE
14 years 1 months ago
DS-PPS: A Practical Framework to Guarantee Differentiated QoS in Terabit Routers with Parallel Packet Switch
—Parallel Packet Switch (PPS) is used intensively in today’s terabit router to construct the switching fabric. Basic PPS equally deals with all of the traffic in order to achie...
Lei Shi, Bin Liu, Wenjie Li, Beibei Wu, Yunhao Liu