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» Reducing Compilation Time Overhead in Compiled Simulators
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CGO
2007
IEEE
14 years 2 months ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke
POS
1998
Springer
14 years 4 days ago
Optimizing the Read and Write Barriers for Orthogonal Persistence
Persistent programming languages manage volatile memory as a cache for stable storage, imposing a read barrier on operations that access the cache, and a write barrier on updates ...
Antony L. Hosking, Nathaniel Nystrom, Quintin I. C...
APCSAC
2006
IEEE
14 years 2 months ago
A Study of the Performance Potential for Dynamic Instruction Hints Selection
Abstract. Instruction hints have become an important way to communicate compile-time information to the hardware. They can be generated by the compiler and the post-link optimizer ...
Rao Fu, Jiwei Lu, Antonia Zhai, Wei-Chung Hsu
PARA
2004
Springer
14 years 1 months ago
A Tool to Display Array Access Patterns in OpenMP Programs
Abstract. A program analysis tool can play an important role in helping users understand and improve OpenMP codes. Array privatization is one of the most effective ways to improve...
Oscar Hernandez, Chunhua Liao, Barbara M. Chapman
FM
2003
Springer
107views Formal Methods» more  FM 2003»
14 years 1 months ago
A Formal Framework for Modular Synchronous System Design
We present the formal framework for a novel approach for specifying and automatically implementing systems such as digital circuits and network protocols. The goal is to reduce the...
Maria-Cristina V. Marinescu, Martin C. Rinard