663 search results - page 4 / 133 » Reducing Compilation Time Overhead in Compiled Simulators |
HIPEAC
2007
Springer
14 years 1 months ago
2007
Springer
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
LCTRTS
1999
Springer
13 years 11 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
EURODAC
1994
IEEE
13 years 11 months ago
1994
IEEE
Due to the complexity of today's systems, prototyping by simulation must be based on simulation-engine-like performance. It is proved by implementations that compiler-driven ...
CGO
2011
IEEE
12 years 10 months ago
2011
IEEE
—This paper describes our trace-based JIT compiler (trace-JIT) for Java developed from a production-quality method-based JIT compiler (method-JIT). We first describe the design a...
CGO
2009
IEEE
14 years 1 months ago
2009
IEEE
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...