Sciweavers

663 search results - page 50 / 133
» Reducing Compilation Time Overhead in Compiled Simulators
Sort
View
NLDB
2007
Springer
14 years 2 months ago
Developing Methods and Heuristics with Low Time Complexities for Filtering Spam Messages
In this paper, we propose methods and heuristics having high accuracies and low time complexities for filtering spam e-mails. The methods are based on the n-gram approach and a heu...
Tunga Güngör, Ali Çiltik
DSD
2006
IEEE
107views Hardware» more  DSD 2006»
14 years 2 months ago
A High Level Power Model for the Nostrum NoC
We propose a power model for the Nostrum NoC. For this purpose an empirical power model of links and switches has been formulated and validated with the Synopsys Power Compiler. T...
Sandro Penolazzi, Axel Jantsch
FPL
2009
Springer
172views Hardware» more  FPL 2009»
14 years 17 days ago
Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
Nachiket Kapre, André DeHon
ICPP
1998
IEEE
14 years 6 days ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
PLDI
1990
ACM
14 years 54 min ago
Task Granularity Analysis in Logic Programs
While logic programming languages offer a great deal of scope for parallelism, there is usually some overhead associated with the execution of goals in parallel because of the wor...
Saumya K. Debray, Nai-Wei Lin, Manuel V. Hermenegi...