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VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 8 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
DAC
2007
ACM
14 years 9 months ago
A Self-Tuning Configurable Cache
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
Ann Gordon-Ross, Frank Vahid
LCPC
2005
Springer
14 years 1 months ago
Lightweight Monitoring of the Progress of Remotely Executing Computations
Abstract. The increased popularity of grid systems and cycle sharing across organizations requires scalable systems that provide facilities to locate resources, to be fair in the u...
Shuo Yang, Ali Raza Butt, Y. Charlie Hu, Samuel P....
PPOPP
1995
ACM
13 years 11 months ago
Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation
Low-overhead message passing is critical to the performance of many applications. Active Messages[27] reduce the software overhead for message handling: messages are run as handle...
Deborah A. Wallach, Wilson C. Hsieh, Kirk L. Johns...
DAC
2009
ACM
14 years 9 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong