663 search results - page 96 / 133 » Reducing Compilation Time Overhead in Compiled Simulators |
ACSAC
2006
IEEE
14 years 2 months ago
2006
IEEE
Address space randomization is an emerging and promising method for stopping a broad range of memory corruption attacks. By randomly shifting critical memory regions at process in...
IEEEPACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
ICCD
2002
IEEE
14 years 5 months ago
2002
IEEE
During the course of a program’s execution, a processor performs many trivial computations; that is, computations that can be simplified or where the result is zero, one, or equ...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...