155 search results - page 10 / 31 » Reducing Design Complexity of the Load Store Queue |
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
IEEEPACT
2000
IEEE
14 years 13 days ago
2000
IEEE
Recent research suggests that DSM clusters can benefit from parallel coherence controllers. Parallel controllers require address partitioning and synchronization to avoid handlin...
WOWMOM
2005
ACM
14 years 1 months ago
2005
ACM
This paper presents a Self-Reorganizing Slot Allocation (SRSA) mechanism for TDMA based Medium Access Control (MAC) in multi-cluster sensor networks. The aim is to provide a MAC l...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
HPCA
2000
IEEE
14 years 14 days ago
2000
IEEE
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...