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» Reducing Expression Size Using Rule-Based Integration
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119
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ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
15 years 6 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
89
Voted
DATE
2002
IEEE
166views Hardware» more  DATE 2002»
15 years 7 months ago
Event Model Interfaces for Heterogeneous System Analysis
Complex embedded systems consist of hardware and software components from different domains, such as control and signal processing, many of them supplied by different IP vendors. ...
Kai Richter, Rolf Ernst
156
Voted
BMCBI
2006
146views more  BMCBI 2006»
15 years 2 months ago
A database application for pre-processing, storage and comparison of mass spectra derived from patients and controls
Background: Statistical comparison of peptide profiles in biomarker discovery requires fast, userfriendly software for high throughput data analysis. Important features are flexib...
Mark K. Titulaer, Ivar Siccama, Lennard J. Dekker,...
125
Voted
ICCD
2004
IEEE
97views Hardware» more  ICCD 2004»
15 years 11 months ago
Runtime Execution Monitoring (REM) to Detect and Prevent Malicious Code Execution
1 Many computer security threats involve execution of unauthorized foreign code on the victim computer. Viruses, network and email worms, Trojan horses, backdoor programs used in ...
A. Murat Fiskiran, Ruby B. Lee
140
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ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
15 years 7 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic